JPH0475448U - - Google Patents
Info
- Publication number
- JPH0475448U JPH0475448U JP11877890U JP11877890U JPH0475448U JP H0475448 U JPH0475448 U JP H0475448U JP 11877890 U JP11877890 U JP 11877890U JP 11877890 U JP11877890 U JP 11877890U JP H0475448 U JPH0475448 U JP H0475448U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- data
- fifo memory
- read lock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Detection And Prevention Of Errors In Transmission (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11877890U JPH0475448U (en]) | 1990-11-13 | 1990-11-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11877890U JPH0475448U (en]) | 1990-11-13 | 1990-11-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0475448U true JPH0475448U (en]) | 1992-07-01 |
Family
ID=31866741
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11877890U Pending JPH0475448U (en]) | 1990-11-13 | 1990-11-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0475448U (en]) |
-
1990
- 1990-11-13 JP JP11877890U patent/JPH0475448U/ja active Pending
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